Authors : Harifetranirina Rakotomalala; Pr. Randriamaroson Rivo Mahandrisoa

Volume/Issue : Volume 10 - 2025, Issue 9 - September

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Google Scholar : https://tinyurl.com/ymesdhs8

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DOI : https://doi.org/10.38124/ijisrt/25sep483

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Abstract : Modern smart home devices integrate wireless communication and power switching functions on compact printed circuit boards (PCBs), making them vulnerable to electromagnetic interference (EMI). This work investigates the optimization of a Wi-Fi-enabled relay module based on the ESP8266 and N76E003 microcontroller. The approach combines finite element modeling in Ansys SIwave with PCB-level design countermeasures. Key optimizations included improved decoupling, via stitching, and stack-up refinement. Simulation and validation results show significant reductions in power distribution network resonances and transient emissions, ensuring compliance with CISPR Class B. The study demonstrates that systematic PCB design improvements effectively enhance the electromagnetic compatibility of IoT modules.

Keywords : Electromagnetic Interference; Electromagnetic Compatibility; Smart Home IoT; Wi-Fi Module; PCB Optimization; Finite Element Method ; Power Distribution Network.

References :

1.  H. W. Ott, Electromagnetic Compatibility Engineering. Wiley, 2009.
2.  IEC, CISPR 32:2015 – Electromagnetic compatibility of multimedia equipment – Emission requirements, 2015.
3.  FCC, 47 CFR Part 15 – Radio Frequency Devices. Washington DC, USA, 2017.
4.  P. Mathur and S. Raman, “Electromagnetic interference (EMI): Measurement and reduction techniques,” J. Electron. Mater., vol. 49, no. 5, pp. 2975–2995, 2020. doi: 10.1007/s11664-020-07979-1.
5.  B. Archambeault, C. Brench, and S. Connor, “Review of printed-circuit-board level EMI/EMC issues and tools,” IEEE Transactions on Electromagnetic Compatibility, vol. 52, no. 2, pp. 455–461, May 2010.  M. Mehri Sookhtekoohi and A. Amini, “Stochastic EMI noise model of PCB layout for circuit-level analysis of IoT systems,” Microelectronics J., vol. 116, 105256, 2021. doi: 10.1016/j.mejo.2021.105256.
6.  J. Victoria, A. Suarez, P. A. Martinez, et al., “Advanced characterization of a hybrid shielding solution for reducing electromagnetic interferences at board level,” Electronics, vol. 13, no. 3, p. 598, 2024. doi: 10.3390/electronics13030598.
7.  Ansys Inc., SIwave User’s Guide: Power Integrity, Signal Integrity, EMI/EMC Analysis, 2023. [Online]. Available: https://www.ansys.com.
8.  R. F. Harrington, Field Computation by Moment Methods. Macmillan, 1968.
9.  A. E. Ruehli, “Equivalent circuit models for three-dimensional multiconductor systems,” IEEE Trans. Microw. Theory Tech., vol. 22, no. 3, pp. 216–221, 1974. doi: 10.1109/TMTT.1974.1128204.
10. T.-L. Wu, F. Buesink, and F. Canavero, “Overview of SI and EMC design technologies on PCB: fundamentals and latest progress,” IEEE Trans. Electromagn. Compat., vol. 55, no. 4, pp. 624–638, Aug. 2013. doi: 10.1109/TEMC.2013.2257796.
11. B. Archambeault, C. Brench, and S. Connor, “Review of printed-circuit-board level EMI/EMC issues and tools,” IEEE Trans. Electromagn. Compat., vol. 52, no. 2, pp. 455–461, May 2010. doi: 10.1109/TEMC.2010.2044182.
12.  D. M. Hockanson, J. L. Drewniak, T. H. Hubing, et al., “Investigation of fundamental EMI source mechanisms driving common-mode radiation from printed circuit boards with attached cables,” IEEE Trans. Electromagn. Compat., vol. 38, no. 4, pp. 557–566, Nov. 1996. doi: 10.1109/15.544310.
13. A. Bhargava, D. Pommerenke, K. W. Kam, F. Centola, and C. W. Lam, “DC-DC buck converter EMI reduction using PCB layout modification,” IEEE Trans. Electromagn. Compat., vol. 53, no. 3, pp. 806–813, Aug. 2011. doi: 10.1109/TEMC.2011.2145421.