Authors : Vempuluru Kusuma; Ch. Pallavi

Volume/Issue : Volume 10 - 2025, Issue 10 - October

Google Scholar : https://tinyurl.com/z729k2bx

Scribd : https://tinyurl.com/45vack53

DOI : https://doi.org/10.38124/ijisrt/25oct315

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Abstract : Transistor size decreases with technological advances and increases speed. This reduction leads to SRAM cells used for air and space applications. it is vulnerable to radiation. triggering multi-node agitation as well. There are energy- efficient dual node upsets in this article. For low- performance air and space applications, recoverable 14T- SRAM cells were used. In this extend, the modern RSP-14T- SRAM-Bitzelle (radiation remedy in speed and execution) points to make strides speed, execution productivity and unwavering quality in radiation-prone situations. The proposed RSP-14T 8-bit SRAM cell plan by optimizing at the format level of 65 nm-CMOS innovation. By stacking the cooperation impact into the off-state transistor, this plan makes strides flexibility against single occasion disarray and occasions for a few grades of disarray. In high-rating situations, overwhelming particle strikes can ionize semiconductor materials and make intemperate loads that can be recorded at delicate circuit hubs. This makes the placement ideal for radiation curing capabilities.

Keywords : 14T SRAM, Aerospace Applications, Tanner EDA, High-Performance Memory and 65 nm CMOS.

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